
Obj/FWlib_apt32f172_spi.o:     file format elf32-csky-little


Disassembly of section .text:

00000000 <SPI_DeInit>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SPI_DeInit(void)
{
    SPI0->CR0   	= SPI_CR0_RST;
   0:	1069      	lrw      	r3, 0	// 24 <SPI_DeInit+0x24>
   2:	3200      	movi      	r2, 0
   4:	9360      	ld.w      	r3, (r3, 0)
   6:	b340      	st.w      	r2, (r3, 0)
    SPI0->CR1   	= SPI_CR1_RST;
   8:	b341      	st.w      	r2, (r3, 0x4)
    SPI0->DR   	 	= SPI_DR_RST;
   a:	b342      	st.w      	r2, (r3, 0x8)
    SPI0->SR   	 	= SPI_SR_RST;
   c:	3203      	movi      	r2, 3
   e:	b343      	st.w      	r2, (r3, 0xc)
    SPI0->CPSR   	= SPI_CPSR_RST;
  10:	3200      	movi      	r2, 0
  12:	b344      	st.w      	r2, (r3, 0x10)
    SPI0->IMSCR   	= SPI_IMSCR_RST;
  14:	b345      	st.w      	r2, (r3, 0x14)
    SPI0->RISR   	= SPI_RISR_RST;
  16:	3208      	movi      	r2, 8
  18:	b346      	st.w      	r2, (r3, 0x18)
    SPI0->MISR   	= SPI_MISR_RST;
  1a:	3200      	movi      	r2, 0
  1c:	b347      	st.w      	r2, (r3, 0x1c)
    SPI0->ICR	 	= SPI_ICR_RST;
  1e:	b348      	st.w      	r2, (r3, 0x20)
}
  20:	783c      	rts
  22:	0000      	bkpt
  24:	00000000 	.long	0x00000000

00000028 <SPI_NSS_IO_Init>:
//SPI_NSS_IO_GROUP:0~2
//ReturnValue:NONE
/*************************************************************/
void SPI_NSS_IO_Init(U8_T SPI_NSS_IO_GROUP)
{
	if(SPI_NSS_IO_GROUP==0)
  28:	3840      	cmpnei      	r0, 0
  2a:	0809      	bt      	0x3c	// 3c <SPI_NSS_IO_Init+0x14>
	{
		GPIOC0->CONLR = (GPIOC0->CONLR&0XFFFFFFF0)  | 0x00000004;				//PC0.0
  2c:	1365      	lrw      	r3, 0	// 1c0 <SPI_Wakeup_Disable+0x14>
  2e:	310f      	movi      	r1, 15
  30:	9340      	ld.w      	r2, (r3, 0)
  32:	9260      	ld.w      	r3, (r2, 0)
  34:	68c5      	andn      	r3, r1
  36:	3ba2      	bseti      	r3, r3, 2
	{
		GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF)  | 0x60000000;				//PA0.7
	}
	else if(SPI_NSS_IO_GROUP==2)
	{
		GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000005;				//PB0.0
  38:	b260      	st.w      	r3, (r2, 0)
	}
}
  3a:	783c      	rts
	else if(SPI_NSS_IO_GROUP==1)
  3c:	3841      	cmpnei      	r0, 1
  3e:	0809      	bt      	0x50	// 50 <SPI_NSS_IO_Init+0x28>
		GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF)  | 0x60000000;				//PA0.7
  40:	1361      	lrw      	r3, 0	// 1c4 <SPI_Wakeup_Disable+0x18>
  42:	9340      	ld.w      	r2, (r3, 0)
  44:	9260      	ld.w      	r3, (r2, 0)
  46:	4364      	lsli      	r3, r3, 4
  48:	4b64      	lsri      	r3, r3, 4
  4a:	3bbd      	bseti      	r3, r3, 29
  4c:	3bbe      	bseti      	r3, r3, 30
  4e:	07f5      	br      	0x38	// 38 <SPI_NSS_IO_Init+0x10>
	else if(SPI_NSS_IO_GROUP==2)
  50:	3842      	cmpnei      	r0, 2
  52:	0bf4      	bt      	0x3a	// 3a <SPI_NSS_IO_Init+0x12>
		GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000005;				//PB0.0
  54:	127d      	lrw      	r3, 0	// 1c8 <SPI_Wakeup_Disable+0x1c>
  56:	310f      	movi      	r1, 15
  58:	9340      	ld.w      	r2, (r3, 0)
  5a:	9260      	ld.w      	r3, (r2, 0)
  5c:	68c5      	andn      	r3, r1
  5e:	3ba0      	bseti      	r3, r3, 0
  60:	3ba2      	bseti      	r3, r3, 2
  62:	07eb      	br      	0x38	// 38 <SPI_NSS_IO_Init+0x10>

00000064 <SPI_Master_Init>:
//ReturnValue:NONE
/*************************************************************/
//SPI波特率:FSSPCLK = FPCLK / (CPSDVR × (1 + SCR))
//FPCLK (max) → 2 × FSSPCLKOUT (max)主机	最快波特率
void SPI_Master_Init(SPI_IO_TypeDef SPI_IO , SPI_DATA_SIZE_TypeDef SPI_DATA_SIZE_x , SPI_SPO_TypeDef SPI_SPO_X , SPI_SPH_TypeDef SPI_SPH_X , SPI_LBM_TypeDef SPI_LBM_X , SPI_RXIFLSEL_TypeDef SPI_RXIFLSEL_X , U8_T SPI_SCR , U8_T SPI_CPSDVSR )
{
  64:	14c4      	push      	r4-r7
  66:	1422      	subi      	sp, sp, 8
  68:	9886      	ld.w      	r4, (sp, 0x18)
  6a:	b880      	st.w      	r4, (sp, 0)
  6c:	9887      	ld.w      	r4, (sp, 0x1c)
  6e:	b881      	st.w      	r4, (sp, 0x4)
  70:	1d09      	addi      	r5, sp, 36
  72:	1c08      	addi      	r4, sp, 32
	//U16_T rdata=0;
	if (SPI_IO==SPI_G0)
  74:	3840      	cmpnei      	r0, 0
{
  76:	8480      	ld.b      	r4, (r4, 0)
  78:	85a0      	ld.b      	r5, (r5, 0)
	if (SPI_IO==SPI_G0)
  7a:	081f      	bt      	0xb8	// b8 <SPI_Master_Init+0x54>
    {
		GPIOA1->CONLR = (GPIOA1->CONLR&0XFF000FFF)  | 0x00444000;            //PA1.3->SPI_SCK,PA1.4->SPI_MISO,PA1.5->SPI_MOSI
  7c:	1214      	lrw      	r0, 0	// 1cc <SPI_Wakeup_Disable+0x20>
  7e:	12f5      	lrw      	r7, 0xfff000	// 1d0 <SPI_Wakeup_Disable+0x24>
  80:	90c0      	ld.w      	r6, (r0, 0)
  82:	9600      	ld.w      	r0, (r6, 0)
  84:	681d      	andn      	r0, r7
  86:	12f4      	lrw      	r7, 0x444000	// 1d4 <SPI_Wakeup_Disable+0x28>
  88:	6c1c      	or      	r0, r7
  8a:	b600      	st.w      	r0, (r6, 0)
    }
    else if(SPI_IO==SPI_G1)
    {
		GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF000)  | 0x00000666;            //PA0.8->SPI_SCK,PA0.9->SPI_MISO,PA0.10->SPI_MOSI
    }
	SPI0->CR0|=SPI_DATA_SIZE_x|(SPI_SPO_X<<6)|(SPI_SPH_X<<7)|(SPI_SCR<<8);
  8c:	1213      	lrw      	r0, 0	// 1d8 <SPI_Wakeup_Disable+0x2c>
  8e:	4367      	lsli      	r3, r3, 7
  90:	9000      	ld.w      	r0, (r0, 0)
  92:	90c0      	ld.w      	r6, (r0, 0)
  94:	6cc4      	or      	r3, r1
  96:	6d8c      	or      	r6, r3
  98:	4488      	lsli      	r4, r4, 8
  9a:	6d18      	or      	r4, r6
  9c:	4246      	lsli      	r2, r2, 6
  9e:	6c90      	or      	r2, r4
  a0:	b040      	st.w      	r2, (r0, 0)
	SPI0->CPSR=SPI_CPSDVSR;
  a2:	b0a4      	st.w      	r5, (r0, 0x10)
	SPI0->CR1|=0X02|SPI_LBM_X|(SPI_RXIFLSEL_X<<4);
  a4:	9061      	ld.w      	r3, (r0, 0x4)
  a6:	9840      	ld.w      	r2, (sp, 0)
  a8:	3ba1      	bseti      	r3, r3, 1
  aa:	6cc8      	or      	r3, r2
  ac:	9841      	ld.w      	r2, (sp, 0x4)
  ae:	4244      	lsli      	r2, r2, 4
  b0:	6cc8      	or      	r3, r2
  b2:	b061      	st.w      	r3, (r0, 0x4)
	//rdata=SPI0->DR;
}
  b4:	1402      	addi      	sp, sp, 8
  b6:	1484      	pop      	r4-r7
    else if(SPI_IO==SPI_G1)
  b8:	3841      	cmpnei      	r0, 1
  ba:	0be9      	bt      	0x8c	// 8c <SPI_Master_Init+0x28>
		GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF000)  | 0x00000666;            //PA0.8->SPI_SCK,PA0.9->SPI_MISO,PA0.10->SPI_MOSI
  bc:	1202      	lrw      	r0, 0	// 1c4 <SPI_Wakeup_Disable+0x18>
  be:	12e8      	lrw      	r7, 0xfff	// 1dc <SPI_Wakeup_Disable+0x30>
  c0:	90c0      	ld.w      	r6, (r0, 0)
  c2:	9601      	ld.w      	r0, (r6, 0x4)
  c4:	681d      	andn      	r0, r7
  c6:	12e7      	lrw      	r7, 0x666	// 1e0 <SPI_Wakeup_Disable+0x34>
  c8:	6c1c      	or      	r0, r7
  ca:	b601      	st.w      	r0, (r6, 0x4)
  cc:	07e0      	br      	0x8c	// 8c <SPI_Master_Init+0x28>

000000ce <SPI_Slave_Init>:
//ReturnValue:NONE
/*************************************************************/
//SPI波特率:FSSPCLK = FPCLK / (CPSDVR × (1 + SCR))
//FPCLK (max) → 12 × FSSPCLKIN (max)从机	最快波特率
void SPI_Slave_Init(SPI_IO_TypeDef SPI_IO , SPI_DATA_SIZE_TypeDef SPI_DATA_SIZE_x , SPI_RXIFLSEL_TypeDef SPI_RXIFLSEL_X , U8_T SPI_SCR , U8_T SPI_CPSDVSR)
{
  ce:	14c3      	push      	r4-r6
	//U16_T rdata=0;
	if (SPI_IO==SPI_G0)
  d0:	3840      	cmpnei      	r0, 0
{
  d2:	d88e000c 	ld.b      	r4, (sp, 0xc)
	if (SPI_IO==SPI_G0)
  d6:	0818      	bt      	0x106	// 106 <SPI_Slave_Init+0x38>
    {
		GPIOA1->CONLR = (GPIOA1->CONLR&0XFF000FFF)  | 0x00444000;            //PA1.3->SPI_SCK,PA1.4->SPI_MISO,PA1.5->SPI_MOSI
  d8:	111d      	lrw      	r0, 0	// 1cc <SPI_Wakeup_Disable+0x20>
  da:	11de      	lrw      	r6, 0xfff000	// 1d0 <SPI_Wakeup_Disable+0x24>
  dc:	90a0      	ld.w      	r5, (r0, 0)
  de:	9500      	ld.w      	r0, (r5, 0)
  e0:	6819      	andn      	r0, r6
  e2:	11dd      	lrw      	r6, 0x444000	// 1d4 <SPI_Wakeup_Disable+0x28>
  e4:	6c18      	or      	r0, r6
  e6:	b500      	st.w      	r0, (r5, 0)
    }
    else if(SPI_IO==SPI_G1)
    {
		GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF000)  | 0x00000666;            //PA0.8->SPI_SCK,PA0.9->SPI_MISO,PA0.9->SPI_MOSI
    }
	SPI0->CR0|=SPI_DATA_SIZE_x|(SPI_SCR<<8);
  e8:	111c      	lrw      	r0, 0	// 1d8 <SPI_Wakeup_Disable+0x2c>
  ea:	4368      	lsli      	r3, r3, 8
  ec:	9000      	ld.w      	r0, (r0, 0)
  ee:	90a0      	ld.w      	r5, (r0, 0)
  f0:	6c54      	or      	r1, r5
  f2:	6cc4      	or      	r3, r1
  f4:	b060      	st.w      	r3, (r0, 0)
	SPI0->CPSR=SPI_CPSDVSR;
  f6:	b084      	st.w      	r4, (r0, 0x10)
	SPI0->CR1|=0X06|(SPI_RXIFLSEL_X<<4);
  f8:	9061      	ld.w      	r3, (r0, 0x4)
  fa:	3ba1      	bseti      	r3, r3, 1
  fc:	3ba2      	bseti      	r3, r3, 2
  fe:	4244      	lsli      	r2, r2, 4
 100:	6c8c      	or      	r2, r3
 102:	b041      	st.w      	r2, (r0, 0x4)
	//rdata=SPI0->DR;
}
 104:	1483      	pop      	r4-r6
    else if(SPI_IO==SPI_G1)
 106:	3841      	cmpnei      	r0, 1
 108:	0bf0      	bt      	0xe8	// e8 <SPI_Slave_Init+0x1a>
		GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF000)  | 0x00000666;            //PA0.8->SPI_SCK,PA0.9->SPI_MISO,PA0.9->SPI_MOSI
 10a:	110f      	lrw      	r0, 0	// 1c4 <SPI_Wakeup_Disable+0x18>
 10c:	11d4      	lrw      	r6, 0xfff	// 1dc <SPI_Wakeup_Disable+0x30>
 10e:	90a0      	ld.w      	r5, (r0, 0)
 110:	9501      	ld.w      	r0, (r5, 0x4)
 112:	6819      	andn      	r0, r6
 114:	11d3      	lrw      	r6, 0x666	// 1e0 <SPI_Wakeup_Disable+0x34>
 116:	6c18      	or      	r0, r6
 118:	b501      	st.w      	r0, (r5, 0x4)
 11a:	07e7      	br      	0xe8	// e8 <SPI_Slave_Init+0x1a>

0000011c <SPI_WRITE_BYTE>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SPI_WRITE_BYTE(U16_T wdata)
{
	while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	
 11c:	116f      	lrw      	r3, 0	// 1d8 <SPI_Wakeup_Disable+0x2c>
 11e:	3102      	movi      	r1, 2
 120:	9340      	ld.w      	r2, (r3, 0)
 122:	9263      	ld.w      	r3, (r2, 0xc)
 124:	68c4      	and      	r3, r1
 126:	3b40      	cmpnei      	r3, 0
 128:	0ffd      	bf      	0x122	// 122 <SPI_WRITE_BYTE+0x6>
	SPI0->DR = wdata;
 12a:	b202      	st.w      	r0, (r2, 0x8)
	while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//wait for transmition finish
 12c:	3110      	movi      	r1, 16
 12e:	9263      	ld.w      	r3, (r2, 0xc)
 130:	68c4      	and      	r3, r1
 132:	3b40      	cmpnei      	r3, 0
 134:	0bfd      	bt      	0x12e	// 12e <SPI_WRITE_BYTE+0x12>
}
 136:	783c      	rts

00000138 <SPI_READ_BYTE>:

U16_T SPI_READ_BYTE(U16_T wdata)
{
	U16_T rdata=0;
	while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	
 138:	1168      	lrw      	r3, 0	// 1d8 <SPI_Wakeup_Disable+0x2c>
 13a:	3102      	movi      	r1, 2
 13c:	9360      	ld.w      	r3, (r3, 0)
 13e:	9343      	ld.w      	r2, (r3, 0xc)
 140:	6884      	and      	r2, r1
 142:	3a40      	cmpnei      	r2, 0
 144:	0ffd      	bf      	0x13e	// 13e <SPI_READ_BYTE+0x6>
	SPI0->DR = wdata;
 146:	b302      	st.w      	r0, (r3, 0x8)
	while(((SPI0->SR) & SSP_RNE) != SSP_RNE);	
 148:	3104      	movi      	r1, 4
 14a:	9343      	ld.w      	r2, (r3, 0xc)
 14c:	6884      	and      	r2, r1
 14e:	3a40      	cmpnei      	r2, 0
 150:	0ffd      	bf      	0x14a	// 14a <SPI_READ_BYTE+0x12>
	rdata = SPI0->DR;  	//get data from FIFO
 152:	9302      	ld.w      	r0, (r3, 0x8)
 154:	7401      	zexth      	r0, r0
	while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//wait for transmition finish
 156:	3110      	movi      	r1, 16
 158:	9343      	ld.w      	r2, (r3, 0xc)
 15a:	6884      	and      	r2, r1
 15c:	3a40      	cmpnei      	r2, 0
 15e:	0bfd      	bt      	0x158	// 158 <SPI_READ_BYTE+0x20>
	return rdata;
}
 160:	783c      	rts

00000162 <SPI_ConfigInterrupt_CMD>:
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/ 
void SPI_ConfigInterrupt_CMD(SPI_IMSCR_TypeDef SPI_IMSCR_X , FunctionalStatus NewState)
{
	if (NewState != DISABLE)
 162:	3940      	cmpnei      	r1, 0
 164:	107d      	lrw      	r3, 0	// 1d8 <SPI_Wakeup_Disable+0x2c>
 166:	0c06      	bf      	0x172	// 172 <SPI_ConfigInterrupt_CMD+0x10>
	{
		SPI0->IMSCR  |= SPI_IMSCR_X;						//SET
 168:	9340      	ld.w      	r2, (r3, 0)
 16a:	9265      	ld.w      	r3, (r2, 0x14)
 16c:	6c0c      	or      	r0, r3
 16e:	b205      	st.w      	r0, (r2, 0x14)
	}
	else
	{
		SPI0->IMSCR  &= ~SPI_IMSCR_X;					//CLR
	}
}   
 170:	783c      	rts
		SPI0->IMSCR  &= ~SPI_IMSCR_X;					//CLR
 172:	9360      	ld.w      	r3, (r3, 0)
 174:	9345      	ld.w      	r2, (r3, 0x14)
 176:	6c02      	nor      	r0, r0
 178:	6808      	and      	r0, r2
 17a:	b305      	st.w      	r0, (r3, 0x14)
}   
 17c:	07fa      	br      	0x170	// 170 <SPI_ConfigInterrupt_CMD+0xe>

0000017e <SPI_Int_Enable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SPI_Int_Enable(void)
{
    INTC_ISER_WRITE(SPI_INT);    
 17e:	107a      	lrw      	r3, 0	// 1e4 <SPI_Wakeup_Disable+0x38>
 180:	3280      	movi      	r2, 128
 182:	9360      	ld.w      	r3, (r3, 0)
 184:	23ff      	addi      	r3, 256
 186:	424c      	lsli      	r2, r2, 12
 188:	b340      	st.w      	r2, (r3, 0)
}
 18a:	783c      	rts

0000018c <SPI_Int_Disable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SPI_Int_Disable(void)
{
    INTC_ICER_WRITE(SPI_INT);    
 18c:	1076      	lrw      	r3, 0	// 1e4 <SPI_Wakeup_Disable+0x38>
 18e:	32c0      	movi      	r2, 192
 190:	9360      	ld.w      	r3, (r3, 0)
 192:	4241      	lsli      	r2, r2, 1
 194:	60c8      	addu      	r3, r2
 196:	3280      	movi      	r2, 128
 198:	424c      	lsli      	r2, r2, 12
 19a:	b340      	st.w      	r2, (r3, 0)
}
 19c:	783c      	rts

0000019e <SPI_Wakeup_Enable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SPI_Wakeup_Enable(void)
{
    INTC_IWER_WRITE(SPI_INT);    
 19e:	1072      	lrw      	r3, 0	// 1e4 <SPI_Wakeup_Disable+0x38>
 1a0:	3280      	movi      	r2, 128
 1a2:	9360      	ld.w      	r3, (r3, 0)
 1a4:	23ff      	addi      	r3, 256
 1a6:	424c      	lsli      	r2, r2, 12
 1a8:	b350      	st.w      	r2, (r3, 0x40)
}
 1aa:	783c      	rts

000001ac <SPI_Wakeup_Disable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SPI_Wakeup_Disable(void)
{
    INTC_IWDR_WRITE(SPI_INT);    
 1ac:	106e      	lrw      	r3, 0	// 1e4 <SPI_Wakeup_Disable+0x38>
 1ae:	32e0      	movi      	r2, 224
 1b0:	9360      	ld.w      	r3, (r3, 0)
 1b2:	4241      	lsli      	r2, r2, 1
 1b4:	60c8      	addu      	r3, r2
 1b6:	3280      	movi      	r2, 128
 1b8:	424c      	lsli      	r2, r2, 12
 1ba:	b340      	st.w      	r2, (r3, 0)
}
 1bc:	783c      	rts
	...
 1ce:	0000      	.short	0x0000
 1d0:	00fff000 	.long	0x00fff000
 1d4:	00444000 	.long	0x00444000
 1d8:	00000000 	.long	0x00000000
 1dc:	00000fff 	.long	0x00000fff
 1e0:	00000666 	.long	0x00000666
 1e4:	00000000 	.long	0x00000000
